What actually happens when the when the RS flip-flop input is 11?

In today's example with the NOR gate flip-flop, if the inputs go to 11, the output at $Q\bar{Q}$ will go to 00, which is allowed. However this is not a good situation, because we will not get stable, reproducible behavior if RS inputs go to 00 from 11-- we could get $Q\bar{Q}$ either 10 or 01, possibly wobbling back and forth before settling (unstably) into one of the two. This situation is to be avoided for practical circuit design.

(Note Eggleston has a NAND-based flip-flop, which has similar behavior but inverted state logic.)