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Content Questions
Subsections
How do you know the most ``efficient'' way to build a logic gate, and does it matter?
What's the difference between OR and exclusive OR?
Are XOR gates produced separately or do you always have to build it out of other gates?
What causes time delay in logic gates?
How does a clock get rid of glitches?
How do you make a clock signal?
What is the fastest switch time? What limits it?
For the TTL NOR gate, won't the 5 V drop across the resistor always be the same, regardless of
, making
always the same?
What would happen if different logic families are combined? e.g. TTL and NIM signals.
Why with NIM or ECL is the negative voltage level chosen to be true?
How does an ASIC work in terms of logic circuits?
Kate Scholberg 2017-04-11
, making 
always the same?